1. Field of the Invention
The invention relates to a level shift circuit which supplies constant DC output level at all time by correcting the level shift quantity of an output signal according to a drift of DC component of an input signal.
2. Description of the Prior Art
In the semiconductor integrated circuit, DC level of the necessary input signal varies depending on its kind. When DC level of the input signal deviates from the input DC level necessary for the circuit, a waveform of output signal is distorted. Therefore, an input DC level should be maintained constant. A factor which causes DC level variation depends on element characteristics of transistor (h.sub.fe and v.sub.be) and resistor used in the semiconductor integrated circuit. The factor varies depending on temperature and conditions during manufacturing. Accordingly, circuits constituted of these elements will have characteristics which vary by the temperature change and manufacturing conditions. DC level of the input signal also varies when passing through such circuits.
Therefore, when inputting a signal into a certain circuit in a semiconductor integrated circuit, DC level of input signal needs to be matched with an input DC level of the circuit. For this reason, a level shift circuit is almost always used when connecting a single circuit with other circuit. When a signal is inputted into the level shift circuit, its amplitude remains the same while its DC voltage varies. There is a kind of level shift circuit which uses capacitive coupling or voltage drop of the resistor. The level shift circuit using a capacitive coupling circuit is unsuitable for semiconductor integrated circuit since it needs to increase the capacity value or ohmic value of a capacitor used for capacitive coupling when the frequency of handled signal is low. From this reason, diodes are generally used in the level shift circuit.
For the level shift circuit which shifts the input signal by a certain constant voltage and outputs it, conventional circuits shown in FIGS. 9, 10 and 11 are used.
FIG. 9 is a level shift circuit consisted of transistor Q.sub.21, resistor R.sub.21, constant current source I.sub.21. In FIG. 9, a signal inputted from the input terminal 21 is shifted by the sum of the base-emitter interval voltage (V.sub.BE) of NPN transistor and the voltage drop (R.sub.21 .times.I.sub.21) of resistor R.sub.21, and outputted from the output terminal 22.
FIG. 10 is a level shift circuit consisted of a transistor Q.sub.22, a resistor R.sub.22, a constant current source I.sub.22 an outer terminal 23 which is connected with the outside circuit of integrated semiconductor circuit. In FIG. 10, current value of the constant current source I.sub.22 is controlled through the outer terminal 23 by controlling the quantity of resistor voltage drop of R.sub.24 from the outside. Thus, a desired level shift quantity is obtained in this level shift circuit.
FIG. 11 comprises a signal source 91, transistors Q.sub.91 and Q.sub.92 and resistors R.sub.91 and R.sub.92 which constitute a differential amplifier. FIG. 11 further comprises a constant current source 92, transistors Q.sub.93 and Q.sub.94 whose collectors are connected to a constant voltage source 97 and their bases are connected to collectors of transistors Q.sub.92 and Q.sub.91, respectively, diodes D.sub.91, D.sub.92 and D.sub.93 connected in series to the emitter of transistor Q.sub.93, diodes D.sub.94, D.sub.95 and D.sub.96 connected in series connection to the emitter of transistor Q.sub.94, an output terminal 98 connected to the cathode of diodes D.sub.93, a constant current source 95 whose one end is contacted to the earth and the other end is connected to the cathode of diodes D.sub.93. FIG. 11 further comprises an output terminal 99 connected to the cathode of diodes D.sub.96, a constant current source 96 whose one end is connected to the earth and the other end is connected to the cathode of diodes D.sub.96, resistors R.sub.95 and R.sub.96 whose respective one end is connected to the cathodes of diodes D.sub.93 and D.sub.96, respectively, and common junction ends are connected to non-inverted input terminal of error amplifier 94, which obtain in-phase output voltage in the level shift circuit, a reference voltage source 93 whose one end is connected to the constant voltage source 97 and the other end is connected to the inverted input terminal of the error amplifier 94. The output of the error amplifier 94 is connected to the base of transistor Q.sub.95, the emitter of the transistor Q.sub.95 is connected to the earth, resistors R.sub.93 and R.sub.94 whose respective one end is connected to the collectors of transistors Q.sub.91 and Q.sub.92, respectively, whose common ends are connected to the collector of transistor Q.sub.95.
An operation of FIG. 11 is explained below. When resistors R.sub.95 and R.sub.96 are set to the same ohmic value, the voltage of R.sub.95 and R.sub.96 at common connecting point becomes the same as the in-phase output voltage of level shift circuit. Error amplifier 94 controls the in-phase output voltage to be the same as the inverted input terminal voltage. Assuming the ohmic value of resistors R.sub.91 and R.sub.92 to be R, the current value of constant current source 92 to be I, the collector current of transistor Q.sub.95 to be i, the voltage of reference voltage source 93 to be V1, and the base-emitter interval voltage of transistors Q.sub.93 and Q.sub.94 and the forward voltage of diodes D.sub.91, D.sub.92, D.sub.93, D.sub.94, D.sub.95 and D.sub.96 to be equal to V.sub.BE. By assuming the voltage of constant voltage source 97 as V.sub.CC and ignoring the base current of transistors Q.sub.91, Q.sub.92, Q.sub.93 and Q.sub.94, the in-phase output voltage V.sub.OUT of output terminal 98 and 99 becomes ##EQU1##
The level shift circuit having good temperature characteristics is realized by compensating temperature characteristics of the reference voltage source 93.
The relationship between the input and the output signals in FIG. 11 is explained below. The two inverted signals having the same DC components (shown by straight line) such as a signal A and a signal B in FIG. 12 (a) are outputted from the signal source 91. If the signal A is inputted into the base of Q.sub.91 and the signal B into the base of Q.sub.92, then, signals similar to the signal A and B are outputted from the output terminals 98 and 99. In other words, if the phase delay of input and output signals can be ignored, signals having the same phase as the signals A and B, respectively, and having the respective amplitude amplified by the predetermined gain are outputted from the output terminals 98 and 99. Since DC voltage of the output terminals 98 and 99 are equal and the value of resisters R.sub.95 and R.sub.96 are also equal, an averaged signal which is generated by averaging the output terminals 98 and 99 is inputted into the non-inverted input terminal of error amplifier 94. Since the polarity of the output terminals 98 and 99 are opposite, an average DC component of both output signals is extracted.
If the temperature varies here, since the forward voltage of diodes D.sub.91 .about.D.sub.96 varies, each DC voltage of the output terminals 98 and 99 varies, and the non-inverted input voltage of error amplifier 94 varies too. As a result, the error amplifier 94 causes its output voltage and the collector current i of Q.sub.95 to vary. The collector current causes the current which flows in the load resistors R.sub.91 and R.sub.92 through resistors R.sub.93 and R.sub.94 to vary. The error amplifier 94 finally causes the average DC voltage of the terminals 98 and 99 to be equal to (V.sub.CC -V.sub.1). Where, V.sub.1 is a reference voltage which is inputted into the inverted terminal of error amplifier 94. The DC voltage (in-phase output voltage) of the output terminals 98 and 99 is kept constant in this way.
In FIG. 9, since the quantity of the level shift is constant, if DC component of the input signal inputted into the terminal 21 varies, the level of terminal 22 shifts according to the level variation of the input signal. Therefore, it was impossible to get the constant DC output level.
In FIG. 10, it is necessary to provide an outer terminal 23 which controls the current value of the constant current source I.sub.21 from the outside of IC. It is also necessary to supply a special wiring to the outer terminal in the integrated circuit. These are not desirable for an integrated circuit design. Furthermore, if DC component of the signal inputted into the input terminal 21 always varies, it is further necessary to supply another terminal and other wiring for detecting voltage variation of the input terminal 21 in the integrated circuit, which are also not desirable for a integrated circuit design.
A variation of DC level of the input signal in FIG. 11 is considered below. If each DC voltage of the two signals outputted from the signal source 91 varies in the same direction, there is no problem, because there appears no variation in DC voltage at the output terminals 98 and 99 by nature of differential amplifier. On the other hand, it is possible that each DC voltage of the two input signals deviates towards opposite directions as shown in FIG. 12 (b). In FIG. 12 (b), one of the two signals, DC level of the input signal A, rises such as a signal A' after a certain point, and another signal, DC level of the input signal B, falls by the same value such as signal B'. The signal B' is obtained by simply inverting the signal of signal A'. The output from the signal source 91 is thought to be such a pair signals. In this case, signals from the output terminals 98 and 99 vary towards the same direction as signals A' and B' and each DC voltage at the two output terminals becomes different. But, since the two signals of the output terminals keeps inverted relation, the average voltage of the both signals does not change. If there is a drift in the input signal level, the in-phase output voltage remains constant and DC voltage of the output terminal can not be kept constant because the variation of the DC voltage of the output terminal cannot be detected.
It is an object of the present invention is to solve the problems mentioned above. The present invention relates to a level shift circuit for keeping DC level of the output signal constant by controlling a shift quantity of the output signal in accordance with the drift of DC level of the input signal.
It is further object of the present invent to provide a level shift circuit in which DC component of the output signal remains the same without any regulation even if DC component of the input signal changes.
It is further object of the present invention is to provide a level shift circuit where DC component of the input voltage of the input terminal is extracted and the extracted voltage is compared with the reference voltage in the operational amplifier. Then, the output of the operational amplifier controls the current source one end of which is grounded to the earth in order to obtain a constant DC output voltage by compensating quantity of DC component of the input signal.
It is further object of the present invention to provide a level shift circuit where the current source connected to the power source is controlled by the output of the operational amplifier in order to obtain DC output voltage which has a higher shift level than the DC level of the input voltage.
It is further object of the present invention to provide a level shift circuit where the shift level difference between the input and output of the level shift circuit can be controlled to be smaller than the voltage V.sub.BE by causing the difference between the input level and output level of the buffer to be smaller than the voltage V.sub.BE between the emitter and the base of transistor.
It is further object of the present invention to provide a level shift circuit wherein DC component is easily extracted by using a low pass filter, a peak hold circuit or a sample hold circuit as DC component extraction circuit.
In order to solve the problems above, a first level shift circuit of the present invention comprises a first circuit comprising a first buffer, a first resistor and a first constant current source. The circuit further comprises a second circuit comprising a second buffer, a second resistor and a second constant current source. The circuit further comprises an operational amplifier having an inverted terminal and a non-inverted terminal. An input signal is applied to the first circuit, DC component extracted from the input signal is applied to the second circuit, voltage where voltage drop in the second resistor is subtracted from said DC component is applied to the inverted terminal of the operational amplifier, and reference voltage is applied to the non-inverted terminal of the operational amplifier. Then the first and the second constant current sources are controlled by an output of the operational amplifier, thereby a drift of DC component of the input signal is corrected and an output voltage having a constant shift level is obtained.
Further, in the first level shift circuit of the present invention, the level shift circuit comprises a DC component extraction circuit, a first and a second buffers, a first and a second resistors, a first and a second constant current sources and an operational amplifier. An input terminal is connected to one end of the first buffer, the other end of the first buffer is connected to one end of a first resistor, the other end of the first resister is connected to one end of a first constant current source, and the other end of the constant current source is connected to the earth.
An output terminal is connected to a junction of the other end of the first resistor and one end of the constant current source.
One end of DC component extraction circuit is connected to the input terminal and the other end of DC component extraction circuit is connected to one end of a second buffer, the other end of the second buffer is connected to one end of a second resistor, the other end of the second resistor is connected to one end of a second constant current source, the other end of this constant current source is connected to the earth, the other end of the second resistor is also connected to an inverted terminal of the operational amplifier.
A reference terminal from which a reference voltage is applied is connected to a non-inverted terminal of the operational amplifier, an output of the operational amplifier is connected to a control terminal which controls current values of the first and the second constant current sources. Thereby a drift of DC component of the input signal is corrected and an output voltage having a constant shift level is obtained.
In the second level shift circuit of the present invention, the level shift circuit comprises DC component extraction circuit, a first and a second buffers, a first and a second resistors, a first and a second constant current sources and an operational amplifier. An input terminal is connected to one end of the first buffer, the other end of the first buffer is connected to one end of a first resistor, the other end of the first resister is connected to one end of a first constant current source, the other end of the constant current source is connected to the power source. An output terminal is connected to a junction of the other end of the first resistor and one end of the constant current source, one end of DC component extraction circuit is connected to the input terminal and the other end of DC component extraction circuit is connected to one end of a second buffer, the other end of the second buffer is connected to one end of a second resistor, the other end of the second resistor is connected to one end of a second constant current source, the other end of this constant current source is connected to the power source, the other end of the second resistor is also connected to an inverted terminal of the operational amplifier. A reference terminal from which a reference voltage is applied is connected to a non-inverted terminal of the operational amplifier, an output of the operational amplifier is connected to a control terminal which controls current values of the first and the second constant current sources. Thereby a drift of DC component of the input signal is corrected and an output voltage having a constant shift level is obtained.
In the first level shift circuit of the present invention, the inputs of the first and the second buffer are connected to each base of respective transistors and outputs are connected to each emitter of respective transistors, the power source is connected to each collector of the respective transistors and the first and the second constant current sources constitutes a mirror circuit.
In the second level shift circuit of the present invention, the inputs of the first and the second buffer are connected to each base of respective transistors and outputs are connected to each emitter of respective transistors, the earth is connected to each collector of the respective transistors, and the first and the second constant current sources constitutes a mirror circuit.
In the first and the second level shift circuits of the present invention, the difference between the input level and output level of the first and the second buffers is smaller than the base-emitter interval voltage V.sub.BE of the transistor, and the first and the second constant current sources constitutes a mirror circuit.
In said the first or the second buffer circuit of the first and the second level shift circuits of the present invention, a collector of the transistor is connected to a power source and an emitter of the transistor is connected to one end of a constant current source, the other end of the constant current source is connected to earth, an output terminal of this buffer circuit is connected to a junction between the emitter of the transistor and the one end of the current source, said junction is also connected to an inverted terminal of an operational amplifier, an input terminal of this buffer circuit is connected to a non-inverted terminal of the operational amplifier and an output terminal of this operational amplifier is connected to a base of the transistor.
In the first level shift circuit of the present invention, said operational amplifier comprises first and second NPN transistors and third and fourth PNP transistors, a base of the first NPN transistor defines a non-inverted terminal of the operational amplifier, a base of the second NPN transistor defines an inverted terminal of the operational amplifier, a collector of the second NPN transistor defines an output terminal of the operational amplifier, emitters of the third and the fourth PNP transistors are connected to a power source, respectively, collectors of the third and the fourth PNP transistors are connected to collectors of the first and the second NPN transistors, respectively, bases of the third and the fourth PNP transistor is connected commonly, the common connecting point of the bases of the third and the fourth PNP transistors is connected to the collector of the third PNP transistor.
In the second level shift circuit of the present invention, said operational amplifier comprises first and second PNP transistors and third and fourth NPN transistors, a base of the first PNP transistor defines a non-inverted terminal of the operational amplifier, a base of the second PNP transistor defines an inverted terminal of the operational amplifier, a collector of the second PNP transistor defines an output terminal of the operational amplifier, emitters of the third and the fourth NPN transistors are connected to earth, respectively, collectors of the third and the fourth NPN transistors are connected to collectors of the first and the second PNP transistors, respectively, bases of the third and the fourth NPN transistor is connected commonly, the common connecting point of the bases of the third and the fourth NPN transistors is connected to the collector of the third NPN transistor.
In the first and the second level shift circuits of the present invention, said DC component extraction circuit comprises a low pass filter, a peak hold circuit or a sample hold circuit.